SMART HOSTESS IO card Settings and Configuration

COMTROL CORPORATION

SMART HOSTESS

Card Type
I/O controller
Chipset/Controller
Texas Instruments (UART)
I/O Options
Serial ports (4 or 8)
Maximum DRAM
N/A

CONNECTIONS
Purpose
Location
Purpose
Location
100 Pin interface connector
CN1
Upgrade module connector 2
CN3
Upgrade module connector 1
CN2

PRIMARY I/O ADDRESS CONFIGURATION
Address
SW1/1
SW1/2
SW1/3
SW1/4
SW1/5
SW1/6
SW1/7
SW1/8
218h-21Bh
On
Off
Off
Off
Off
Off
Off
On
21Ch-21Fh
Off
On
Off
Off
Off
Off
Off
On
238h-23Bh
Off
Off
On
Off
Off
Off
Off
On
23Ch-23Fh
Off
Off
Off
On
Off
Off
Off
On
Note:Primary addresses are used with Compaq 386, PC’s Limited 386, Kaypro 386, Mylex, AMI and most other models.

SECONDARY I/O ADDRESS CONFIGURATION
Address
SW1/1
SW1/2
SW1/3
SW1/4
SW1/5
SW1/6
SW1/7
SW1/8
218h-21Bh
On
Off
Off
Off
Off
Off
On
On
21Ch-21Fh
Off
On
Off
Off
Off
Off
On
On
238h-23Bh
Off
Off
On
Off
Off
Off
On
On
23Ch-23Fh
Off
Off
Off
On
Off
Off
On
On
Note:Secondary addresses are used with ALR FlexCache 20386, Mitsubishi MP386, Olivetti 386, and AT&T WGS models.

BASE MEMORY ADDRESS
Address
SW1/1
SW1/2
SW1/4
SW1/5
SW1/6
SW1/7
SW1/8
80000h-8FFFFh
On
On
Off
Off
Off
Off
Off
90000h-9FFFFh
Off
On
Off
Off
Off
Off
Off
A0000h-AFFFFh
On
Off
Off
Off
Off
Off
Off
D0000h-DFFFFh
Off
Off
Off
Off
Off
Off
Off

I/O ADDRESS CONFIGURATION
Address
SW1/3
»
238h-23bh
On

338h-33bh
Off

INTERRUPT SELECTION
IRQ
JP30
JP31
JP32
JP33
JP34
JP35
IRQ2
Pins 1 & 2
N/A
N/A
N/A
N/A
N/A
IRQ3
N/A
Pins 1 & 2
N/A
N/A
N/A
N/A
IRQ4
N/A
N/A
Pins 1 & 2
N/A
N/A
N/A
IRQ5
N/A
N/A
N/A
Pins 1 & 2
N/A
N/A
IRQ6
N/A
N/A
N/A
N/A
Pins 1 & 2
N/A
IRQ7
N/A
N/A
N/A
N/A
N/A
Pins 1 & 2
IRQ9
Pins 2 & 3
N/A
N/A
N/A
N/A
N/A
IRQ10
N/A
Pins 2 & 3
N/A
N/A
N/A
N/A
IRQ11
N/A
N/A
Pins 2 & 3
N/A
N/A
N/A
IRQ12
N/A
N/A
N/A
Pins 2 & 3
N/A
N/A
IRQ14
N/A
N/A
N/A
N/A
Pins 2 & 3
N/A
IRQ15
N/A
N/A
N/A
N/A
N/A
Pins 2 & 3
Note: Pins designated should be in the closed position. For AT & T, UNIX and INTERACTIVE, the available interrupts are 3, 4, 5, 7, 10, 11, 12, 14, and 15. For SunOS the available Interrupts are 3, 5, 10, and 11.

BIOS CONFIGURATION
EPROM Type
JP3
JP4
»
2764, 27128
Pins 2 & 3 closed
Pins 2 & 3 closed

27256
Pins 2 & 3 closed
Pins 1 & 2 closed

27512
Pins 1 & 2 closed
Pins 1 & 2 closed

PC/AT MODE SELECTION
Mode
JP1
PC compatible
Pins 2 & 3 closed
AT compatible
Pins 1 & 2 closed

ASYNCHRONOUS PROTOCOL SELECTION
Port
Jumper
Ports 1 & 2
J8B & J8G closed
Ports 3 & 4
J9B & J9G closed
Ports 5 & 6
J10B & J10G closed
Ports 7 & 8
J11B & J11G closed
SYNCHRONOUS PROTOCOL SELECTION FOR RECEIVE CLOCK SIGNAL
Port
Jumper
Ports 1 & 2
J8E & J8J closed
Ports 3 & 4
J9E & J9J closed
Ports 5 & 6
J10E & J10J closed
Ports 7 & 8
J11E & J11J closed
SYNCHRONOUS PROTOCOL SELECTION FOR TRANSMIT CLOCK SIGNAL(DCE SOURCE)
Port
Jumper
Ports 1 & 2
J8D & J8I closed
Ports 3 & 4
J9D & J9I closed
Ports 5 & 6
J10D & J10I closed
Ports 7 & 8
J11D & J11I closed
SYNCHRONOUS PROTOCOL SELECTION FOR TRANSMIT CLOCK SIGNAL(DTE SOURCE)
Port
Jumper
1
J8A closed
2
N/A
3
N/A
4
N/A
5
J10A closed
6
N/A
7
N/A
8
N/A
SYNCHRONOUS PROTOCOL SELECTION FOR RS-422 INTERFACE
Port
Jumper
1
J8A pin 2 and J8B pin 2 vertically jumpered, J8E closed
2
J8F closed
3
J9A closed
4
J9F closed
5
J10A pin 2 and J10B pin 2 vertically jumpered, J10E closed
6
J10F closed
7
J11A closed
8
J11F closed
MISCELLANIOUS TECHNICAL NOTE
Serial ports are located on an interface box which connects to the Smart Hostess via the 100-pin interface connector.

SMART HOSTESS IO card Settings and Configuration

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Card Type	I/O controller
Chipset/Controller	Texas Instruments (UART)
I/O Options	Serial ports (4 or 8)
Maximum DRAM	N/A

CONNECTIONS
Purpose	Location	Purpose	Location
100 Pin interface connector	CN1	Upgrade module connector 2	CN3
Upgrade module connector 1	CN2

PRIMARY I/O ADDRESS CONFIGURATION
Address	SW1/1	SW1/2	SW1/3	SW1/4	SW1/5	SW1/6	SW1/7	SW1/8
218h-21Bh	On	Off	Off	Off	Off	Off	Off	On
21Ch-21Fh	Off	On	Off	Off	Off	Off	Off	On
238h-23Bh	Off	Off	On	Off	Off	Off	Off	On
23Ch-23Fh	Off	Off	Off	On	Off	Off	Off	On
Note:Primary addresses are used with Compaq 386, PC’s Limited 386, Kaypro 386, Mylex, AMI and most other models.

SECONDARY I/O ADDRESS CONFIGURATION
Address	SW1/1	SW1/2	SW1/3	SW1/4	SW1/5	SW1/6	SW1/7	SW1/8
218h-21Bh	On	Off	Off	Off	Off	Off	On	On
21Ch-21Fh	Off	On	Off	Off	Off	Off	On	On
238h-23Bh	Off	Off	On	Off	Off	Off	On	On
23Ch-23Fh	Off	Off	Off	On	Off	Off	On	On
Note:Secondary addresses are used with ALR FlexCache 20386, Mitsubishi MP386, Olivetti 386, and AT&T WGS models.

BASE MEMORY ADDRESS
Address	SW1/1	SW1/2	SW1/4	SW1/5	SW1/6	SW1/7	SW1/8
80000h-8FFFFh	On	On	Off	Off	Off	Off	Off
90000h-9FFFFh	Off	On	Off	Off	Off	Off	Off
A0000h-AFFFFh	On	Off	Off	Off	Off	Off	Off
D0000h-DFFFFh	Off	Off	Off	Off	Off	Off	Off

I/O ADDRESS CONFIGURATION
Address		SW1/3
»	238h-23bh	On
	338h-33bh	Off

INTERRUPT SELECTION
IRQ	JP30	JP31	JP32	JP33	JP34	JP35
IRQ2	Pins 1 & 2	N/A	N/A	N/A	N/A	N/A
IRQ3	N/A	Pins 1 & 2	N/A	N/A	N/A	N/A
IRQ4	N/A	N/A	Pins 1 & 2	N/A	N/A	N/A
IRQ5	N/A	N/A	N/A	Pins 1 & 2	N/A	N/A
IRQ6	N/A	N/A	N/A	N/A	Pins 1 & 2	N/A
IRQ7	N/A	N/A	N/A	N/A	N/A	Pins 1 & 2
IRQ9	Pins 2 & 3	N/A	N/A	N/A	N/A	N/A
IRQ10	N/A	Pins 2 & 3	N/A	N/A	N/A	N/A
IRQ11	N/A	N/A	Pins 2 & 3	N/A	N/A	N/A
IRQ12	N/A	N/A	N/A	Pins 2 & 3	N/A	N/A
IRQ14	N/A	N/A	N/A	N/A	Pins 2 & 3	N/A
IRQ15	N/A	N/A	N/A	N/A	N/A	Pins 2 & 3
Note: Pins designated should be in the closed position. For AT & T, UNIX and INTERACTIVE, the available interrupts are 3, 4, 5, 7, 10, 11, 12, 14, and 15. For SunOS the available Interrupts are 3, 5, 10, and 11.

BIOS CONFIGURATION
EPROM Type		JP3	JP4
»	2764, 27128	Pins 2 & 3 closed	Pins 2 & 3 closed
	27256	Pins 2 & 3 closed	Pins 1 & 2 closed
	27512	Pins 1 & 2 closed	Pins 1 & 2 closed

PC/AT MODE SELECTION
Mode	JP1
PC compatible	Pins 2 & 3 closed
AT compatible	Pins 1 & 2 closed

ASYNCHRONOUS PROTOCOL SELECTION
Port	Jumper
Ports 1 & 2	J8B & J8G closed
Ports 3 & 4	J9B & J9G closed
Ports 5 & 6	J10B & J10G closed
Ports 7 & 8	J11B & J11G closed

SYNCHRONOUS PROTOCOL SELECTION FOR RECEIVE CLOCK SIGNAL
Port	Jumper
Ports 1 & 2	J8E & J8J closed
Ports 3 & 4	J9E & J9J closed
Ports 5 & 6	J10E & J10J closed
Ports 7 & 8	J11E & J11J closed

SYNCHRONOUS PROTOCOL SELECTION FOR TRANSMIT CLOCK SIGNAL(DCE SOURCE)
Port	Jumper
Ports 1 & 2	J8D & J8I closed
Ports 3 & 4	J9D & J9I closed
Ports 5 & 6	J10D & J10I closed
Ports 7 & 8	J11D & J11I closed

SYNCHRONOUS PROTOCOL SELECTION FOR RS-422 INTERFACE
Port	Jumper
1	J8A pin 2 and J8B pin 2 vertically jumpered, J8E closed
2	J8F closed
3	J9A closed
4	J9F closed
5	J10A pin 2 and J10B pin 2 vertically jumpered, J10E closed
6	J10F closed
7	J11A closed
8	J11F closed