TMC RESEARCH CORPORATION
EBUS8B (VER.1.0)
Processor | 80286/80386SX/80386DX/80486SX/80486DX/80486DX2/80486DX4/Pentium(depends on CPU card installed) |
Processor Speed | 8/10/12/16/20/25/33/40/50(internal)/50/60/66(internal)/66/75(internal)/ 75/90/100(internal)/100MHz |
Chip Set | Unidentified |
Max. Onboard DRAM | None |
Cache | None |
BIOS | None |
Dimensions | 220mm x 220mm |
I/O Options | CPU expansion slot, floppy drive interface, IDE interface, parallel port, serial ports (2) |
NPU Options | 8087/80287/80387SX/CX487SLC/80387DX/CX487DLC (depends on CPU card installed) |

CONNECTIONS | |||
Purpose | Location | Purpose | Location |
Serial port 1 | J1 | IDE interface | J5 |
Serial port 2 | J2 | IDE interface LED | J7 |
Parallel port | J3 | Power LED & keylock | J8 |
Floppy drive interface | J4 | CPU expansion slot | SL1 |
USER CONFIGURABLE SETTINGS | |||
Function | Jumper | Position | |
» | Parallel port unidirectional | JP1 | pins 2 & 3 closed |
Parallel port bidirectional | JP1 | pins 1 & 2 closed | |
» | Parallel port direction select PDIR | JP2 | pins 1 & 2 closed |
Parallel port direction select CTR5 | JP2 | pins 2 & 3 closed | |
ISA/EISA BUS CONFIGURATION | ||||
ISA/EISA | RN1 | RN2 | RN3 | RN4 |
ISA | Installed | Installed | Not installed | Not installed |
EISA | Not installed | Not installed | Installed | Installed |
I/O CONFIGURATION | |||||||
FDC | IDE | LPT | JP3 | JP4 | JP5 | JP6 | JP7 |
Enabled | Enabled | LPT2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |
Enabled | Enabled | LPT1 | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |
Enabled | Enabled | LPT1 | 2 & 3 | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 |
Enabled | Enabled | LPT1 | 2 & 3 | 2 & 3 | 2 & 3 | 1 & 2 | 1 & 2 |
Enabled | Disabled | LPT1 | 2 & 3 | 1 & 2 | 2 & 3 | 2 & 3 | 1 & 2 |
Enabled | Enabled | LPT1 | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 | 2 & 3 |
Disabled | Enabled | LPT1 | 2 & 3 | 1 & 2 | 1 & 2 | 2 & 3 | 2 & 3 |
Disabled | Disabled | Disabled | 2 & 3 | 2 & 3 | 2 & 3 | 2 & 3 | 2 & 3 |
Note: Pins designated should be in closed position. | |||||||
I/O CONFIGURATION (CON’T) | ||||||
COM1 | COM2 | JP3 | JP4 | JP5 | JP6 | JP7 |
COM1 | COM2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |
COM1 | COM2 | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |
COM3 | COM4 | 2 & 3 | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 |
COM1 | Disabled | 2 & 3 | 2 & 3 | 2 & 3 | 1 & 2 | 1 & 2 |
COM1 | COM2 | 2 & 3 | 1 & 2 | 2 & 3 | 2 & 3 | 1 & 2 |
Disabled | Disabled | 2 & 3 | 1 & 2 | 1 & 2 | 1 & 2 | 2 & 3 |
Disabled | Disabled | 2 & 3 | 1 & 2 | 1 & 2 | 2 & 3 | 2 & 3 |
Disabled | Disabled | 2 & 3 | 2 & 3 | 2 & 3 | 2 & 3 | 2 & 3 |
Note: Pins designated should be in closed position. | ||||||